In a market full of AI tools that arrived last year and declared themselves the future of chip design, we want to tell a different story. ChipNexus is the evolution of three years of focused research, real customer deployments, and hard-won technical depth in EDA — not a pivot, not a rebrand, not a moment’s inspiration. This is where we came from, and why it matters.
The Problem Nobody Had Solved
Semiconductor design is one of the most complex engineering disciplines on earth. A modern chip may contain tens of billions of transistors, designed by teams of engineers working across multiple toolchains, over design cycles that span years. And yet the core workflow — writing HDL, closing timing, debugging waveforms, generating testbenches — still relies on senior engineers executing highly manual, iterative processes that haven’t fundamentally changed in decades.
The bottleneck isn’t silicon. It’s human expertise at scale. When a single timing closure problem can take a senior engineer days of trial-and-error, and when verification engineers spend weeks hunting bugs in waveforms they read line by line, the cost of that expertise compounds across every design. The question was never whether AI could help. The question was whether AI could be made to actually understand hardware design — its physics, its constraints, its failure modes — well enough to be trusted with real work.
That question is what PrimisAI was founded to answer in 2023.
The Foundation: PrimisAI (2023–2025)
The company traces its roots to academic research at the intersection of AI and Electronic Design Automation. Dr. Valerio Tenace, who became our CTO, had been publishing in this space since 2016 — authoring over 20 research papers and filing 4 patents on AI for hardware design before PrimisAI was incorporated. His foundational work produced RapidGPT: an early platform that let FPGA engineers describe design intent in natural language and receive syntactically correct, contextually aware Verilog code in return.
This wasn’t a general-purpose LLM with a hardware prompt. RapidGPT was built from the ground up to understand EDA tool context, hardware design conventions, and the specific constraints that make chip design different from software engineering. Engineers at Rapid Silicon, Marvell and University of Utah were among the first to adopt it — and their feedback shaped everything that followed.
Year One · Foundation
PrimisAI Founded — RapidGPT Launches
PrimisAI incorporates with a founding team anchored by Prof. Pierre-Emmanuel Gaillardon (University of Utah) and Dr. Valerio Tenace, creator of RapidGPT. First venture funding closes with Cambium Capital Management and Raptor Group. Early users validate product-market fit for AI-assisted HDL generation.Year Two · Depth
EDA-Aware Agents & the AIvril Framework
Research paper EDA-Aware RTL Generation with Large Language Models published November 2024, introducing the AIvril framework — verification-in-the-loop RTL generation yielding 38–69% improvement in functional pass rates over baseline LLMs. Task Agents, custom LLM integrations, and on-premises enterprise deployments introduced. Additional investors Doorga and a private Family Office join the cap table.Year Three · Architecture
The NEX Multi-Agent Architecture Emerges
PrimisAI publishes Nexus: A Lightweight and Scalable Multi-Agent Framework (February 2025), establishing the architectural foundation for everything that follows. NEX achieves a perfect 100% score on the VerilogEval-Human benchmark — the first platform to do so, outperforming GPT-4, Claude, and DeepSeek-R1 by 28–33%. Magnus Wave-IQ launches, bringing AI to waveform analysis and debug. The company reaches 13 employees.Today · Launch
ChipNexus — The Full Platform Goes to Market
PrimisAI relaunches as ChipNexus, bringing the full NEX agentic ecosystem to market as a unified commercial product. Dan Elmhurst joins as CEO, with 30 years of Intel experience across datacenter CPU & platforms, NVM, SSDs and AI. A second research paper — Adaptive Multi-Agent Reasoning Via Automated Workflow Generation — publishes July 2026. Enterprise engagements live with a Leading Foundry, Leading FPGA vendor, MRAM Start-up, Purdue & Utah University and a National Lab.What NEX Actually Does
The core technical insight driving everything we’ve built is this: you cannot improve chip design by dropping a general-purpose LLM into an EDA environment. Hardware design has its own physics, its own constraint language, its own failure modes — and AI that doesn’t deeply understand those will produce code that looks right and functions wrong. That’s not a copilot. That’s a liability.
NEX is architected differently. Rather than a single model, it uses a hierarchy of specialized agents that collaborate in orchestrated workflows: Task Agents that execute discrete operations, Domain Agents that carry deep EDA context, and Manager Agents that orchestrate full workflows autonomously across the pre-silicon design stack.
Perfect Score
Verified Design
to complete design task
In autonomous timing closure benchmarks, what takes a senior engineer hours of trial-and-error — iterating on constraints, rerunning synthesis, chasing negative slack — NEX resolves in minutes, with multi-objective optimization across timing, power, and area happening simultaneously. On the ArcBench suite of 158 complex logic problems, NEX scored 63% against a best competitor score of 45%, tested against 7 state-of-the-art LLMs and reasoning models.
I added more logic into our design and utilization went up to 80%. FPGA implementation was unable to close with constant cryptic placer errors. Using NEX, I was able to fix the issues and generate bitstream.
Early Customer — FPGA Design TeamThe ChipNexus Platform Today
The full NEX ecosystem now spans the entire pre-silicon workflow, organized into four integrated workstreams. This isn’t a collection of point tools — it’s a coherent agentic environment where context flows from specification through to physical design closure.
01 · Architecture
Spec to Foundational Design
02 · Design
RTL Generation & Code Quality
03 · Verification
Testbench, Coverage & Waveforms
04 · Physical Design
Floorplanning & Timing Closure
The Team
ChipNexus is led by people who have spent careers — not months — in EDA and semiconductor engineering.
Why the Name Change Matters — and What Doesn’t Change
ChipNexus is not a new company. It is the same team, the same technology, the same customers — with a name that finally reflects what we’ve actually built. PrimisAI began with a product called RapidGPT. That product evolved into an agent platform. That platform became NEX. And NEX, now deployed at a Leading Foundry, Leading FPGA vendor, MRAM start-up, National Lab and Purdue & Utah University, is ChipNexus.
The rebrand is a statement of maturity, not a restart. When companies in this space are introducing themselves as if AI chip design began last year, we think it matters that our foundational research papers were published in 2024 and 2025, that our first customers were evaluating real designs in 2023, and that the architecture powering ChipNexus today was three years in development before it shipped.
The global semiconductor market is expected to exceed $1 trillion. The constraint isn’t silicon — it’s experienced engineers. We built ChipNexus to solve that problem at its root: not a smarter search tool, not a better autocomplete, but an autonomous multi-agent system that can take a specification and close a design, with human engineers directing strategy rather than executing every step.
That’s been the mission since 2023. It still is.
